| area | |
|---|---|
| die_um2 | 4906 |
| stdcell_um2 | 1768 |
| utilization | 0.6356 |
| wirelength_um | 2119 |
| cells | |
| flip_flops | 16 |
| logic_gates | 87 |
| buffers | 51 |
| filler_tap | 354 |
| timing | |
| clock_period_ns | 20 |
| setup_slack_worst_ns | 10.57 |
| hold_slack_worst_ns | 3.844 |
| fmax_typical_mhz | 146.2 |
| fmax_worst_corner_mhz | 106.1 |
| power_typical_w | |
| total | 0.0001533 |
| switching | 0.00004986 |
| internal | 0.0001035 |
| leakage | 2.634e-9 |
| checks | |
| drc_errors | 0 |
| lvs_errors | 0 |
| antenna_violations | 0 |
| max_slew_violations | 0 |
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